Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Redirection Table Entry 0 (RTE0) – Offset 10
The Redirection Table has a dedicated entry for each interrupt input pin. The information in the Redirection Table is used to translate the interrupt manifestation on the corresponding interrupt pin into an APIC message.The APIC will respond to an edge triggered interrupt as long as the interrupt is held until after the acknowledge cycle has begun. Once the interrupt is detected, a delivery status bit internally to the I/O APIC is set. The state machine will step ahead and wait for an ackledgement from the APIC unit that the interrupt message was sent. Only then will the I/O APIC be able to recognize a new edge on that interrupt pin. That new edge will only result in a new invocation of the handler if its acceptance by the destination APIC causes the Interrupt Request register bit to go from 0 to 1. (In other words, if the interrupt was not already pending a the destination.)
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
63:56 | 0h | RW | Destination ID (DID) Destination ID of the local APIC |
55:48 | 0h | RW | Extended Destination ID (EDID) These bits are sent to a local APIC only when in Processor System Bus mode. They become bits 11:4 of the address. |
47:17 | 0h | RO | Reserved |
16 | 1h | RW | Mask field (MSK) When set, interrupts are not delivered nor held pending. When cleared, and edge or level on this interrupt results in the delivery of the interrupt. |
15 | 0h | RW | Trigger Mode (TM) When cleared, the interrupt is edge sensitive. When set, the interrupt is level sensitive. |
14 | 0h | RO/V | Remote IRR (RIRR) This is used for level triggered interrupts; its meaning is undefined for edge triggered interrupts. |
13 | 0h | RW | Polarity field (POL) This specifies the polarity of each interrupt input. When cleared, the signal is active high. When set, the signal is active low. |
12 | 0h | RO/V | Delivery Status (DS) This field contains the current status of the delivery of this interrupt. When set, an interrupt is pending and not yet delivered. When cleared, there is no activity for this entry |
11 | 0h | RW | Destination Mode (DSM) This field is used by the local Apic to determine whether it is the destination of the message. |
10:8 | 0h | RW | Delivery Mode (DLM) This field specifies how the APICs listed in the destination field should act upon reception of this signal. Certain Delivery Modes will only operate as intended when used in conjunction with a specific trigger mode. |
7:0 | 0h | RW | Vector field (VCT) This field contains the interrupt vector for this interrupt. Values range between 10h and FEh. |