Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Interrupt Register (INTERRUPTREG) – Offset 3c
Interrupt line Register isn't used in Bridge directly Interrupt Pin register reflects the IPIN value in private config space. Min_gnt register indicating the req of latency timers and max_lat register max latenc
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:24 | 0h | RO | Max Latency Field (MAX_LAT) Value of 0 indicates device has no major requirements for the settings of latency timers |
23:16 | 0h | RO | Min Gnt Field (MIN_GNT) Value of 0 indicates device has no major requirements for the settings of latency timers |
15:12 | 0h | RO | Reserved Field (RESERVED0) This field is Reserved |
11:8 | 0h | RO | Interrupt Pin Field (INTPIN) Interrupt Pin: Value in this register is reflected from the IPIN value in the private configuration space. |
7:0 | 0h | RW/P | Int Line Field (INTLINE) Interrupt Line: It is used to communicate to software the interrupt line to which the interrupt pin is connected |