31:24 | 37h | RW | GPIO Driver Mode Interrupt Select (GPDMINTSEL) IRQ globally for all pads (GPI_IS with corresponding GPI_IE enable). 0 = Interrupt Line 0 1 = Interrupt Line 1 ... 255 = Interrupt Line 255 |
23:20 | 0h | RW | Reserved (Reserved1) |
19:16 | 4h | RW | GPIO Group to GPE_DW2 assignment encoding (GPE0_DW2) This register assigns a specific GPIO Group to the ACPI GPE0[95:64]. The selected GPIO group will be mapped to lower bits of the GPE register 0h = GPP_V[23:0] mapped to GPE[87:64]; other GPE bits not used. 1h = GPP_C[23:0] mapped to GPE[87:64]; other GPE bits not used. 2h = GPP_A[23:0] mapped to GPE[87:64]; other GPE bits not used. 3h = GPP_E[23:0] mapped to GPE[87:64]; other GPE bits not used. 4h = GPP_H[23:0] mapped to GPE[87:64]; other GPE bits not used. 5h = GPP_F[23:0] mapped to GPE[87:64]; other GPE bits not used. 6h = vGPIO mapped to GPE bits[73:72] for Timed GPIO input, mapped to GPE bits[75:74] for THC Wake-on-touch, and mapped to GPE bits[77:76] for THC Windows HIDclass Operation; other GPE bits not used. 7h = VGPIO mapped to GPE bit 65 for CNVi; other GPE bits not used 8h = GPP_S[7:0] mapped to GPE[71:64];other GPE bits not used. 9h = GPP_B[23:0] mapped to GPE[87:64];other GPE bits not used. Ah = GPP_D[23:0] mapped to GPE[87:64]; other GPE bits not used. Bh-Fh = Reserved |
15:12 | 3h | RW | GPIO Group to GPE_DW1 assignment encoding (GPE0_DW1) This register assigns a specific GPIO Group to the ACPI GPE0[63:32]. The selected GPIO group will be mapped to lower bits of the GPE register 0h = GPP_V[23:0] mapped to GPE[55:32]; other GPE bits not used. 1h = GPP_C[23:0] mapped to GPE[55:32]; other GPE bits not used. 2h = GPP_A[23:0] mapped to GPE[55:32]; other GPE bits not used. 3h = GPP_E[23:0] mapped to GPE[55:32]; other GPE bits not used. 4h = GPP_H[23:0] mapped to GPE[55:32]; other GPE bits not used. 5h = GPP_F[23:0] mapped to GPE[55:32]; other GPE bits not used. 6h = vGPIO mapped to GPE bits[41:40] for Timed GPIO input, mapped to GPE bits[43:42] for THC Wake-on-touch, and mapped to GPE bits[45:44] for THC Windows HIDclass Operation; other GPE bits not used. 7h = VGPIO mapped to GPE bit 33 for CNVi; other GPE bits not used 8h = GPP_S[7:0] mapped to GPE[39:32];other GPE bits not used. 9h = GPP_B[23:0] mapped to GPE[55:32];other GPE bits not used. Ah = GPP_D[23:0] mapped to GPE[55:32]; other GPE bits not used. Bh-Fh = Reserved |
11:8 | 2h | RW | GPIO Group to GPE_DW0 assignment encoding (GPE0_DW0) This register assigns a specific GPIO Group to the ACPI GPE0[31:0]. The selected GPIO group will be mapped to lower bits of the GPE register 0h = GPP_V[23:0] mapped to GPE[23:0]; other GPE bits not used. 1h = GPP_C[23:0] mapped to GPE[23:0]; other GPE bits not used. 2h = GPP_A[23:0] mapped to GPE[23:0]; other GPE bits not used. 3h = GPP_E[23:0] mapped to GPE[23:0]; other GPE bits not used. 4h = GPP_H[23:0] mapped to GPE[23:0]; other GPE bits not used. 5h = GPP_F[23:0] mapped to GPE[23:0]; other GPE bits not used. 6h = vGPIO mapped to GPE bits[9:8] for Timed GPIO input, mapped to GPE bits[11:10] for THC Wake-on-touch, and mapped to GPE bits[13:12] for THC Windows HIDclass Operation; other GPE bits not used. 7h = VGPIO mapped to GPE bit 1 for CNVi; other GPE bits not used 8h = GPP_S[7:0] mapped to GPE[7:0];other GPE bits not used. 9h = GPP_B[23:0] mapped to GPE[5:4];other GPE bits not used. Ah = GPP_D[23:0] mapped to GPE[23:0]; other GPE bits not used. Bh-Fh = Reserved |
7:3 | 0h | RO | Reserved |
2 | 0h | RW | GSX Static Local Clock Gating (GSXSLCGEN) Specify whether the Global Serial Expander (GSX) controller should be statically clock gated for power saving if it is not enabled (even though the capability is available). 0 = Disable static local clock gating 1 = Enable static local clock gating |
1 | 0h | RW | GPIO Dynamic Partition Clock Gating Enable (GPDPCGEN) Specify whether the GPIO Community should take part in partition clock gating 0 = Disable participation in dynamic partition clock gating 1 = Enable participation in dynamic partition clock gating |
0 | 0h | RW | GPIO Dynamic Local Clock Gating Enable (GPDLCGEN) Specify whether the GPIO Community should perform local clock gating 0 = Disable dynamic local clock gating 1 = Enable dynamic local clock gating |