Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Device Status Register (DEVSTS) – Offset 8a
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
15:6 | 0h | RO | RESERVED (RSVD) RESERVED |
5 | 0h | RO | Transactions Pending (TP) Endpoints: |
4 | 0h | RO | AUX Power Detected (APD) Functions that require Aux power report this bit as Set if Aux power is detected by the Function. Aux power is not supported. This bit is not connected to any logic. |
3 | 0h | RW/1C | Unsupported Request Detected (URD) This bit indicates that the Function received an Unsupported Request |
2 | 0h | RW/1C | Fatal Error Detected (FED) This bit indicates status of Fatal errors detected. Not supported. This bit is not connected to any logic. |
1 | 0h | RW/1C | Non-Fatal Error Detected (NFED) This bit indicates status of Nonfatal errors detected. |
0 | 0h | RW/1C | Correctable Error Detected (CED) This bit indicates status of correctable errors detected. Not supported. This bit is not connected to any logic |