Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Port 1 Serial ATA Control (PxSCTL1) – Offset 1ac
Same definition as PxSCTL0.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:20 | 0h | RO | RSVD0 (RSVD0) Reserved |
19:16 | 0h | RW | Port Multiplier Port (PMP) This field is not used by AHCI. |
15:12 | 0h | RW | Select Power Management (SPM) This field is not used by AHCI. |
11:8 | 0h | RW | Interface Power Management Transitions Allowed (IPM) Indicates which power states the HBA is allowed to transition to. If an interface power management state is not allowed via this register field, the HBA will not initiate that state and the HBA will PMNAKP any request from the device to enter that state. |
7:4 | 0h | RW | Speed Allowed (SPD) Indicates the highest allowable speed of the interface. If software changes SPD after port has been enabled, software is required to perform a port reset via DET=1h. |
3:0 | 0h | RW | Device Detection Initialization (DET) Controls the HBA.s device detection and interface initialization. This field may only be changed when PxCMD.ST is 0. Changing this field while the HBA is running results in undefined behavior. When PxCMD.ST is set to 1, this field should have a value of 0h. It is permissible to implement any of the Serial ATA defined behaviors for transmission of COMRESET when PxSCTL.DET = 1h. |