Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
VCCIN AUX CONFIG Register (VCCIN_AUX_CFG) – Offset 11d4
This register defines the characteristics of the VCCIN_AUX voltage
rail
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:11 | 0h | RO | Reserved |
10:8 | 0h | RW/L | OFF to ON Voltage Transition Ramp Time (OFF_ON_VOLT_RAMP_TIME_10_8) Voltage transition time required by motherboard voltage regulator when the processor changes the VCCIN_AUX regulator set point from 0V to the high current mode voltage. |
7:0 | 0h | RW/L | OFF to ON Voltage Transition Ramp Time (OFF_ON_VOLT_RAMP_TIME_7_0) Voltage transition time required by motherboard voltage regulator when the processor changes the VCCIN_AUX regulator set point from 0V to the high current mode voltage. |