Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
TCO2_CNT Register (TCTL2) – Offset a
TCO2_CNT Register
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
15:6 | 0h | RO | Reserved (RSVD) Reserved |
5:4 | 0h | RW | OS_POLICY (OS_POLICY) OS-based software writes to these bits to select the policy that the BIOS will use after the platform resets due the WDT. The following convention is recommended for the BIOS and OS: |
3 | 1h | RW | SMB_ALERT_DISABLE (SMB_ALERT_DISABLE) Disables GP/SMBALERT# as an alert source for the heartbeats and the SMBus device. At reset (RSMRST# pin assertion only), this bit is set and the muxed GP/SMBALERT# are disabled. |
2:1 | 0h | RW | INTRD_SEL (INTRD_SEL) Selects the action to take if the INTRUDER# signal goes active. |
0 | 0h | RO | Reserved |