Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
MSIX Capability HEAD (CNVI_WIFI_MSIX_CAP_HEAD) – Offset 80
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31 | 0h | RW | MSIX ENABLE (MSIX_ENABLE) If set to 1, the function is permitted to use MSI-X to request service. |
30 | 0h | RW | Function MASK (FUN_MASK) If set to 1, all of the vectors associated with the function are masked, regardless of their per-vector Mask bit states. If 0, each vector's Mask bit determines whether the vector is masked or not. |
29:27 | 0h | RO | Reserved |
26:16 | fh | RO | TABLE SIZE (TABLE_SIZE) System software reads this field to determine the MSI-X Table Size N, which is encoded as (N-1). Wifi Host supports Table Size of 16 and encodes a number of 15. |
15:8 | 0h | RO | NEXT PTR (NEXT_PTR) Pointer to the next item in the capabilities list. NULL if last |
7:0 | 11h | RO | MSIX Capability Identification (MSIX_CAP_ID) The value of 11h in this field identifies the function as being MSI-X capable. |