Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Touch Host Controller (THC) PCI Configuration (D16:F0/1) Registers
The following registers apply to THC #1 and TCH #2.
- THC #1 at Device 16:Function 0
- THC #2 at Device 16:Function 1
Offset | Size (Bytes) | Register Name (Register Symbol) | Scope | Default Value |
---|---|---|---|---|
0h | 4 | Package | XXXX8086h | |
4h | 4 | Package | 02900000h | |
8h | 4 | Package | 090100XXh | |
ch | 4 | BIST_Header Type_Latency Timer_Cache Line Size (THC_CFG_BIST_HTYPE_LT_CLS) | Package | 00800000h |
10h | 4 | Package | 00000004h | |
14h | 4 | Package | 00000000h | |
2ch | 4 | Package | 00000000h | |
34h | 4 | Package | 00000050h | |
3ch | 4 | Package | 00000000h | |
40h | 4 | Package | 00000000h | |
50h | 4 | MSI Message Control_ Next Pointer and Capability ID (THC_CFG_MSIMC_MSINP_MSICID) | Package | 00807005h |
54h | 4 | Package | 00000000h | |
58h | 4 | Package | 00000000h | |
5ch | 4 | Package | 00000000h | |
70h | 4 | PCI Power Management Capability (THC_CFG_PMCAP_PMNP_PMCID) | Package | C0030001h |
74h | 4 | PCI Power Management Control and Status (THC_CFG_PMD_PMCSRBSE_PMCSR) | Package | 00000008h |
90h | 4 | Package | F0140009h | |
94h | 4 | Package | 01400010h | |
98h | 4 | Package | 00000000h | |
9ch | 4 | Package | 00000101h | |
a0h | 4 | Package | 00000800h | |
a4h | 4 | Package | 00000008h |