Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
REG RFW (RFW) – Offset 78
Receive FIFO Write
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:10 | 0h | NA | Res_31_10 (Res_31_10) Reserved |
9 | 0h | WO | RFFE (RFFE) Receive FIFO Framing Error. These bits are only valid when FIFO access mode |
8 | 0h | WO | RFPE (RFPE) Receive FIFO Parity Error. These bits are only valid when FIFO access mode is |
7:0 | 0h | WO | RFWD (RFWD) Receive FIFO Write Data. These bits are only valid when FIFO access mode is |