Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Resets (RESETS) – Offset 204
Soft reset register
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:3 | 0h | NA | Reserved (Reserved0) i2c RESETS register Reserved bits |
2 | 0h | RW | reset_dma (reset_dma) iDMA Software Reset Control |
1:0 | 0h | RW | reset_ip (reset_ip) reset_i2c (reset_i2c) |