Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Device Capability (CNVI_WIFI_GIO_DEV_CAP) – Offset 44
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:29 | 0h | RO | Reserved |
28 | 1h | RO | Function Level RES (FUNC_LVL_RES) Function Level Reset Capability |
27:26 | 0h | RO | SLT PW LSCL (SLT_PW_LSCL) Captured Slot Power Limit Scale |
25:18 | 0h | RO | SLT PW LVAL (SLT_PW_LVAL) Captured Slot Power Limit Value |
17:16 | 0h | RO | Reserved |
15 | 0h | RO | ROLE BASED Error (ROLE_BASED_ERR) This field indicates that the device support Error reporting |
14:12 | 0h | RO | Reserved |
11:9 | 7h | RO | L [1], Access LAT (L1_ACC_LAT) Endpoint L1 Acceptable Latency |
8:6 | 3h | RO | L0S Access LAT (L0S_ACC_LAT) Endpoint L0s Acceptable Latency |
5 | 0h | RO | EX TAG FIELD (EX_TAG_FIELD) Extended Tag Field Supported |
4:3 | 0h | RO | PHAN FUNCS (PHAN_FUNCS) Phantom Functions Supported |
2:0 | 0h | RO | Maximum PL SIZE (MAX_PL_SIZE) Max_Payload_Size Supported |