Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
SMI Enable (GPI_SMI_EN_GPP_B_0) – Offset 290
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:25 | 0h | RO | Reserved |
24 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_ishi3c0_clk_loopbk) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
23 | 0h | RW | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_23) Same description as bit 14. |
22:21 | 0h | RO | Reserved |
20 | 0h | RW | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_20) Same description as bit 14. |
19:15 | 0h | RO | Reserved |
14 | 0h | RW | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_14) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. |
13 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_13) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
12 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_12) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
11 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_11) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
10 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_10) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
9 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_9) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
8 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_8) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
7 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_7) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
6 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_6) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
5 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_5) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
4 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_4) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
3 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_3) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
2 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_2) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
1 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_1) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |
0 | 0h | RO | GPI SMI Enable (GPI_SMI_EN_xxgpp_b_0) This bit is used to enable/disable the generation of SMI when the corresponding GPI_SMI_STS bit is set. The pad must also be routed for SMI functionality in order for SMI to be generated, i.e. the corresponding GPIROUTSMI must be set to '1'. 0 = disable SMI generation 1 = enable SMI generation Bit assignment: Bit0 = Pad 0 Bit1 = Pad 1 Bit2 = Pad 2 ... Bit N-1 = Pad N-1 \t\t\t |