Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Capabilities List 2 & Message Control Register (CLIST2_MCTL) – Offset d0
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:24 | - | - | Reserved
|
23 | 0x1 | RW/V | 64-bit Capable (64BC) Set to 1 to indicate that the GbE LAN Controller is capable ofgenerating 64-bit message addresses. |
22:20 | 0x0 | RW/V | Multiple Message Enable (MME) Returns 000b to indicate that the GbE LAN controller only supports a single message. |
19:17 | 0x0 | RW/V | Multiple Message Capable (MMC) The GbE LAN controller does not support multiplemessages. |
16 | 0x0 | RW | Message Signal Interrupt Enable (MSIE) 0 = MSI generation is disabled. |
15:8 | 0xe0 | RW/V | Next Capability (NEXT) Value of E0h points to the Function Level Reset capability structure. |
7:0 | 0x5 | RW/V | Capability ID (CID) Indicates the linked list item is a Message Signaled Interrupt Register. |