Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
I2C Raw Interrupt Status (IC_RAW_INTR_STAT) – Offset 34
Unlike the IC_INTR_STAT register, these bits are not masked so they always show the true status of the controller
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:14 | - | - | Reserved
|
13 | 0h | RO | MST_ON_HOLD (MST_ON_HOLD) Same as in IC_INTR_STAT. |
12 | - | - | Reserved
|
11 | 0h | RO | GEN_CALL (GEN_CALL) Same as in IC_INTR_STAT. |
10 | 0h | RO | START_DET (START_DET) Same as in IC_INTR_STAT. |
9 | 0h | RO | STOP_DET (STOP_DET) Same as in IC_INTR_STAT. |
8 | 0h | RO | ACTIVITY (ACTIVITY) Same as in IC_INTR_STAT. |
7 | 0h | RO | RX_DONE (RX_DONE) Same as in IC_INTR_STAT. |
6 | 0h | RO | TX_ABRT (TX_ABRT) Same as in IC_INTR_STAT. |
5 | 0h | RO | RD_REQ (RD_REQ) Same as in IC_INTR_STAT. |
4 | 0h | RO | TX_EMPTY (TX_EMPTY) Same as in IC_INTR_STAT. |
3 | 0h | RO | TX_OVER (TX_OVER) Same as in IC_INTR_STAT. |
2 | 0h | RO | RX_FULL (RX_FULL) Same as in IC_INTR_STAT. |
1 | 0h | RO | RX_OVER (RX_OVER) Same as in IC_INTR_STAT. |
0 | 0h | RO | RX_UNDER (RX_UNDER) Same as in IC_INTR_STAT. |