Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
| ID | Date | Version | Classification |
|---|---|---|---|
| 615146 | 08/09/2019 | 1.2 | Public |
MSI-X Table Base Address (MXTBA) – Offset 10
This BAR is used to allocate 32K, 16K or 8K Memory space for the MSI-X Table. The Memory space size is determined by BIOS by making bit-14 and bit-13 Read-Only '1' or Read-Write '0' based on SATAGC.MSS[1:0].
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 31:15 | 0h | RW | Base Address (BA) Base address of memory space. |
| 14 | 0h | RW | Base Address Bit 14 (BAB14) When SATAGC.MSS[1:0]=00, this bit is Read Only '0' else it's Read Write '0'. |
| 13 | 0h | RW | Base Address Bit 13 (BAB13) When SATAGC.MSS[1:0]=00 or 01, this bit is Read Only '0' else it's Read Write '0'. |
| 12:4 | - | - | Reserved
|
| 3 | 0h | RO | Prefetchable (PF) Indicates that this range is not pre-fetchable. |
| 2:1 | 0h | RO | Type (TP) Indicates that this range can be mapped anywhere in 32-bit address space. |
| 0 | 0h | RO | Resource Type Indicator (RTE) Indicates a request for Memory space. |