Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Global Reset Causes Register 1 (GBLRST_CAUSE1) – Offset 1928
This register logs causes of host partition resets.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:6 | - | - | Reserved
|
5 | 0b | RW/1C/V | ME Set Power Button Status (ME_SET_PBO_STS) If this bit is set, the cause of the previous global reset was ME FW setting the power button override status. |
4 | - | - | Reserved
|
3 | 0b | RW/1C/V | Host SMBus Message (HSMB_MSG) If this bit is set, the cause of the previous global reset was a global reset request received over the host SMBus interface. |
2 | 0b | RW/1C/V | Host Partition Reset Promotion (HOST_RST_PROM) If this bit is set, the cause of the previous global reset was a host partition reset that was promoted to a global reset either due to ME or host policy. |
1 | 0b | RW/1C/V | Sx Entry Timeout (SX_ENTRY_TIMEOUT) If this bit is set, the cause of the previous global reset was an expiration of the timer that runs during Sx entry. |
0 | 0b | RW/1C/V | Host Partition Reset Timeout (HOST_RESET_TIMEOUT) If this bit is set, the cause of the previous global reset was an expiration of the timer that runs during host partition resets. |