Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
Memory Base Address (MBAR) – Offset 10
Value in this register will be different after the enumeration process.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
63:16 | 000000000000h | RW | Base Address (BA) Bits (63:16) correspond to memory address signals (63:16), respectively. This gives 64 KB of relocatable memory space aligned to 64 KB boundaries. |
15:4 | - | - | Reserved
|
3 | 0b | RO | Prefetchable (Prefetchable) This bit is hardwired to 0 indicating that this range should not be prefetched. |
2:1 | 10b | RO | Type (Type) If this field is hardwired to 00 it indicates that this range can be mapped anywhere within 32-bit address space. |
0 | 0b | RO | Resource Type Indicator (RTE) This bit is hardwired to 0 indicating that the base address field in this register maps to memory space |