Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Input/Output Stream Descriptor x Last Valid Index (ISD0LVI) – Offset 8c
NOTE: This register applies to the following input and output streams at the corresponding offsets:
Input stream 0: offset 8Ch
Input stream 1: offset ACh
Input stream 2: offset CCh
Input stream 3: offset ECh
Input stream 4: offset 10Ch
Input stream 5: offset 12Ch
Input stream 6: offset 14Ch
Input stream 7: offset 28Ch
Input stream 8: offset 2ACh
Input stream 9: offset 2CCh
Input stream 10: offset 2ECh
Input stream 11: offset 30Ch
Input stream 12: offset 32Ch
Input stream 13: offset 34Ch
Input stream 14: offset 36Ch
Output stream 0: offset 16Ch
Output stream 1: offset 18Ch
Output stream 2: offset 1ACh
Output stream 3: offset 1CCh
Output stream 4: offset 1ECh
Output stream 5: offset 20Ch
Output stream 6: offset 22Ch
output stream 7: offset 24Ch
Output stream 8: offset 26Ch
Output stream 9: offset 38Ch
Output stream 10: offset 3ACh
Output stream 11: offset 3CCh
Output stream 12: offset 3ECh
Output stream 13: offset 40Ch
Output stream 14: offset 42Ch
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
14:8 | - | - | Reserved
|
7:0 | 00h | RW | Last Valid Index (LVI) The value written to this register indicates the index for the last valid Buffer |