Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
PSF5 Registers
These registers are within the PCH Private Configuration Space which is accessible through the PCH Sideband Interface. They can be accessed via (SBREG_BAR + PortID + Register Offset).
Offset | Size (Bytes) | Register Name (Register Symbol) | Default Value |
---|---|---|---|
4020h | 4 | PSF Port 0 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT0) | 0h |
4024h | 4 | PSF Port 1 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT1) | 0h |
4028h | 4 | PSF Port 2 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT2) | 0h |
402ch | 4 | PSF Port 3 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT3) | 0h |
4030h | 4 | PSF Port 4 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT4) | 0h |
4034h | 4 | PSF Port 5 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT5) | 0h |
4038h | 4 | PSF Port 6 Configuration (PSF_5_PSF_PORT_CONFIG_PG0_PORT6) | 0h |
403ch | 4 | PSF Port Configuration (PSF_5_PSF_PORT_CONFIG_PG1_PORT0) | 0h |