Flash Access Channel Error for Slave 0 (FCERR_SLV0) – Offset 4040
This register is used to determine how to log and report errors on the Flash Access channel, for both Master and Slave Attached Flash configurations.
Bit Range | Default | Access | Field Name and Description |
30:15 | - | - | Reserved |
14:13 | 0b | RW | Flash Access Channel Non-Fatal Error Reporting Enable (FCNFEE) 00: Disable Non-Fatal Error Reporting 01: Reserved 10: Enable Non-Fatal Error Reporting as SERR (SB Do_SErr message) 11: Enable Non-Fatal Error Reporting as SMI (SB Assert_SMI message) Note: SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# isdeasserted. Note: SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted. Note: SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted). |
12 | 0b | RW/1C/V | Flash Access Channel Non-Fatal Error Status (FCNFES) This field is set by hardware if aNon-Fatal Error condition is detected on the Flash Access Channel. Software must clearthis bit. 0: No Non-Fatal Error detected 1: Non-Fatal Error detected (FCNFEC has a non-zero value)Note: Clearing this unlocks the FCNFEC field and triggers an SB Deassert_SMImessage if FCNFEE is set to SMI. Note: Setting of this bit is independent of the enable to generate a SMI/SERR (FCNFEE). |
11:8 | 0b | RO/V | Flash Access Channel Non-Fatal Error Cause (FCNFEC) 0h: No error 1h: Slave Response Code: NONFATAL_ERROR 2h: Slave Response Code: Unsuccessful Completion [for Slave-Attached Flashaccesses only] 3h: Unexpected completion received from Slave (i.e. completion without non-postedrequest or completion with invalid tag or completion with invalid length) [for Slave-Attached Flash accesses only] 2h – 3h: Reserved 4h: Unsupported Cycle Type (w.r.t. Command) 5h: Reserved 6h: Unsupported Address (i.e., address > Flash linear address range) 7h: Reserved 8h – Fh: Reserved Note: This field is updated after a Flash Access Channel transaction is completed if theFCNFES bit is not set |
7 | - | - | Reserved |
6:5 | 0b | RW | Flash Access Channel Fatal Error Reporting Enable (FCFEE) 00: Disable Fatal Error Reporting 01: Reserved 10: Enable Fatal Error Reporting as SERR (SB Do_SErr message) 11: Enable Fatal Error Reporting as SMI (SB Assert_SMI message) Note: SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# isdeasserted. Note: SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted. Note: SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted). |
4 | 0b | RW/1C/V | Flash Access Channel Fatal Error Status (FCFES) This field is set by hardware if a FatalError condition is detected on the Flash Access Channel. Software must clear this bit by writing a 1 to it. 0: No Fatal Error detected 1: Fatal Error Type 2 detected (FCFEC has a non-zero value) Note: Clearing this unlocks the FCFEC field and triggers an IOSF-SB Deassert_SMImessage if FCFEE is set to SMI. Note: Setting of this bit is independent of the enable to generate a SMI/SERR (FCFEE). |
3:0 | 0b | RO/V | Flash Access Channel Fatal Error Cause (FCFEC) 0h: No error 1h – 7h: Reserved 8h: Malformed Slave Response Payload: Payload length > Max Payload Size [Type 2] 9h: Malformed Slave Response Payload: Read request size > Max Read Request Size[for Master-Attached Flash accesses only] [Type 2] Ah – Fh: Reserved Note: This field is updated after a Flash Access Channel transaction is completed if theFCFES bit is not set. |