Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Remote Transmitter Preset/Coefficient List 1 (RTPCL1) – Offset 454
Note: This register must be configured prior to enabling 8.0 GT/s data rate
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31 | 0b | RW | Preset/Coefficient Mode (PCM) This bit defines whether the Preset values or Coefficient values should be sent to the remote TX to adjust the remote TX settings used in Phase 3 of Link Equalization |
30 | 0b | RO | Reserved (RSVD) Reserved |
29:24 | 00h | RW | Remote Transmitter Pre-Cursor Coefficient List 2/Preset List 4 (RTPRECL2PL4) Remote Transmitter Pre-Cursor Coefficient List 2/Preset List 4 (RTPRECL2PL4): |
23:18 | 00h | RW | Remote Transmitter Post-Cursor Coefficient List 1/Preset List 3 (RTPOSTCL1PL3) If RTPCL1.PCM = 0 these bits represent the PCIe* Controller Lane 3 Preset value |
17:12 | 00h | RW | Remote Transmitter Pre-Cursor Coefficient List 1/Preset List 2 (RTPRECL1PL2) If RTPCL1.PCM = 0 these bits represent the PCIe* Controller Lane 2 Preset value |
11:6 | 00h | RW | Remote Transmitter Post-Cursor Coefficient List 0/Preset List 1 (RTPOSTCL0PL1) If RTPCL1.PCM = 0 these bits represent the PCIe* Controller Lane 1 Preset value |
5:0 | 00h | RW | Remote Transmitter Pre-Cursor Coefficient List 0/Preset List 0 (RTPRECL0PL0) If RTPCL1.PCM = 0 these bits represent the PCIe* Controller Lane 0 Preset value |