Host Control 1 (hostcontrol1) – Offset 28 - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

Intel® 400 Series Chipset On-Package Platform Controller Hub

Online Register Database

ID	Date	Version	Classification
615146	08/09/2019	1.2	Public

Host Control 1 (hostcontrol1) – Offset 28

Bit Range	Default	Access	Field Name and Description
7	0h	RW	Card Detect Signal Detection (hostctrl1_cdsigselect) This bit selects source for card detection. 1- The card detect test level is selected 0- SDCD# is selected (for normal use).
6	0h	RW	Card Detect Test Level (hostctrl1_cdtestlevel) This bit is enabled while the Card Detect SignalSelection is set to 1 and it indicates card inserted or not. Generates (card ins or card removal) interrupt when the normal int sts enable bit is set. 1 - Card Inserted 0 - No Card.
5	0h	RW	Extended Data Transfer Width (hostctrl1_extdatawidth) This bit controls 8-bit bus width mode for embeddeddevice. Support of this function is indicated in 8-bit Support for Embedded Device in the Capabilitiesregister. If a device supports 8-bit bus mode, this bit may be set to 1. If this bit is 0, bus width is controlled by Data Transfer Width in the Host Control 1 register.
4:3	0h	RW	DMA Select (hostctrl1_dmaselect) One of supported DMA modes can be selected. The hostdriver shall check support of DMA modes by referringthe Capabilities register. 00 - SDMA is selected 01 - 32-bit Address ADMA1 is selected 10 - 32-bit Address ADMA2 is selected 11 - 64-bit Address ADMA2 is selected.
2	0h	RW	High Speed Enable (hostctrl1_highspeedena) This bit is optional. Before setting this bit, the HD shall check the High Speed Support in the capabilitiesregister. If this bit is set to 0 (default), the HC outputs CMD line and DAT lines at the falling edge of the SD clock (up to 25 MHz/ 20MHz for MMC). If this bit is set to 1, the HC outputs CMD line and DAT lines at the rising edge of the SD clock (up to 50 MHz for SD/52MHz for MMC)/ 208Mhz.
1	0h	RW	Data Transfer Width (hostctrl1_datawidth) This bit selects the data width of the HC. The HD shallselect it to match the data width of the SD card. 1 - 4 bit mode 0 - 1 bit mode.
0	0h	RW	LED Control (hostctrl1_ledcontrol) This bit is used to caution the user not to remove thecard while the SD card is being accessed. If the software is going to issue multiple SD commands, this bit can be set during all transactions. It is not necessary to changefor each transaction. 1 - LED on 0 - LED off.