Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
Link 0 Control (LCTL0) – Offset c44
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:24 | - | - | Reserved
|
23 | 0b | RO/V | Current Power Active (CPA) This value changes to the value set by SPA when the power of the link has reached |
22:17 | - | - | Reserved
|
16 | 1b | RW | Set Power Active (SPA) Software sets this bit to '1' to turn the link on (provided CRSTB = 1), and clears it to '0' |
15:4 | - | - | Reserved
|
3:0 | 0h | RW | Set Clock Frequency (SCF) Indicates the frequency that software wishes the link to run at. Changing this value to a value not supported by Link Capabilities shall result in indeterminate results. The possible encodings are: |