Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Thermal Base (TBAR) – Offset 10
This BAR creates 4K bytes of memory space to signify the base address of Thermal memory mapped configuration registers. This memory space is active when the Command (CMD) register Memory Space Enable (MSE) bit is set and either TBAR[31:12] or TBARH are programmed to a non-zero address. This BAR is owned by the Operating System, and allows the OS to locate the Thermal registers in system memory space.
Note: It is illegal to program the TBAR/TBARH range to overlap the TBARB/TBARBH range. An address can decode to one and only one BAR.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:12 | 00000h | RW | Thermal Base Address (TBA) Base address for the Thermal logic memory mapped configuration registers. 4KB bytes are requested by hardwiring bits 11:4 to 0's. |
11:4 | - | - | Reserved
|
3 | 0b | RO | Prefetchable (PREF) Indicates that this BAR is NOT pre-fetchable. |
2:1 | 10b | RO | Address Range (ADDRNG) Indicates that this BAR can be located anywhere in 64 bit address space. |
0 | 0b | RO | Space Type (SPTYP) Indicates that this BAR is located in memory space. |