Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
PCI Express Additional Link Control (PCIEALC) – Offset 338
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30 | - | - | Reserved
|
29 | 0b | RW | Initialize Transaction Layer Receiver Control on Link Down (ITLRCLD) When set, the transaction layer receive control logic will be re-initialized when the link goes down. This is a survivability mode to recover the system from hang on surprise removal. |
28:27 | - | - | Reserved
|
26 | 0b | RW/P | Block Detect.Quiet->Detect.Active (BLKDQDA) 0: Allow transition (Normal Operation) |
25:0 | - | - | Reserved
|