General Control and Status (GCS) – Offset 274c - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

Intel® 400 Series Chipset On-Package Platform Controller Hub

Online Register Database

ID	Date	Version	Classification
615146	08/09/2019	1.2	Public

General Control and Status (GCS) – Offset 274c

Offset 274Ch: GCS General Control and Status

Bit Range	Default	Access	Field Name and Description
31:16	0000h	RW/L	RPR Destination ID (RPRDID) This field specifies the PCIe port Destination ID that is the target of the I/O ranges specified in the RPR field.Only one PCIe root port at a time can be enabled for Port 8xh support.This field is only valid when GCS.RPR field is set.BIOS must program the bits which are not used to zeros.This register is Read-Only if the DMIC.SRL field is set.Register Attribute: Static.
15:12	-	-	Reserved
11	0b	RW/L	Reserved Page Route (RPR) Determines where to send the reserved page registers. These addresses are sent to PCIe Root Port or LPC/eSPI for the purpose of generating POST codes. The I/O addresses modified by this field are: 80h - 8Fh. When cleared, DMI will not perform source decode on the I/O ranges specified above. The cycles hitting these ranges will end up in P2SB which will then forward the cycle to LPC or eSPI through IOSF Sideband. When set, access to the I/O ranges specified above will be forwarded to PCIe Root Port with the destination ID specified in GCS.RPRDID using DMI source decode. The aliases for these registers, at 90h, 94h, 95h, 96h, 98h, 9Ch, 9Dh, and 9Eh, are never source decoded by DMI. This register is Read-Only if the DMIC.SRL field is set. Register Attribute: Static.
10	0b	RW/V/L	Boot BIOS Strap (BBS) This field determines the destination of accesses to the BIOS memory range. Bits Description 0 SPI 1 LPC/eSPI When SPI or LPC/eSPI is selected, the range that is decoded is further qualified by other configuration bits described in the respective sections. The value in this field can be overwritten by software as long as the BIOS Interface Lock-Down (bit 0) and DMIC.SRL are not set. Register Attribute: Static.
9:1	-	-	Reserved
0	0b	RW/O	BIOS Interface Lock-Down (BILD) BIOS Interface Lock-Down (BILD): When set, prevents GCS.BBS from being changed. This bit can only be written from 0 to 1 once. Register Attribute: Static.