Pad Configuration DW1 (PAD_CFG_DW1_GPD_0) – Offset 604 - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

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Pad Configuration DW1 (PAD_CFG_DW1_GPD_0) – Offset 604

Bit Range	Default	Access	Field Name and Description
30:14	-	-	Reserved
13:10	0000b	RW	Termination (TERM) The Pad Termination state defines the different weak internal pull-up and pull-down settings that are supported by the buffer. The settings for [13:10] correspond to: 0000: none 0100: 20k PD 1100: 20k PU 1111: Native controller selected by Pad Mode controls the Termination. Others: Reserved NOTES: 1. The internal 20K pull-up/pull-down can only be enabled as long as the toggle rate on the signal is no more than 300KHz. 2. If a reserved value is programmed, pad may malfunction. 3. The setting of this field is applicable in all Pad Mode including GPIO. As each Pad Mode may require different termination and isolation, care must be taken in SW in the transition with appropriate register programming. The actual transition sequence requirement may vary on case by case basis depending on the native functions involved. For example, before changing the pad from output to input direction, PU/PD settings should be programmed first to ensure the input does not float momentarily.
9:8	-	-	Reserved
7:0	60h	RO	Interrupt Select (INTSEL) The Interrupt Select defines which interrupt line driven from the GPIO Controller toggles when an interrupt is detected on this pad. 0 = Interrupt Line 0 1 = Interrupt Line 1 .... Up to the max IOxAPIC IRQ supported.

Pad Configuration DW0 (PAD_CFG_DW0_GPD_1)

Pad Configuration DW0 (PAD_CFG_DW0_GPD_0) Pad Configuration DW0 (PAD_CFG_DW0_GPD_1)