Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
L1 Sub-States Capabilities (L1SCAP) – Offset 204
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:24 | - | - | Reserved
|
23:19 | 00101b | RW/O | Port Tpower_on Value (PTV) Along with the Port T_POWER_ON Scale Field in the L1 Substates Capabilities register sets theTime (in us) that this Port requires the port on the opposite side of Link to wait in L1.OFF_EXIT after sampling CLKREQ# asserted before actively driving the interface. |
18 | - | - | Reserved
|
17:16 | 00b | RW/O | Port Tpower_on Scale (PTPOS) Specifies the scale used for Tpower_on value field in the L1 Substates Capabilities register. |
15:8 | 28h | RW/O | Port Common Mode Restore Time (PCMRT) This is the time (in us) required for this Port to re-establish common mode. |
7:5 | - | - | Reserved
|
4 | 1b | RW/O | L1 PM Substates Supported (L1PSS) When Set this bit indicates that this Port supports L1 PM Substates. |
3 | 1b | RW/O | ASPM L1.1 Substates Supported (AL11S) When set, this bit indicates that this port supports L1 substates for ASPM L1.SNOOZ. |
2 | 1b | RW/O | ASPM L1.2 Supported (AL12S) When set, this bit indicates that ASPM_L1.OFF is supported. |
1 | 1b | RW/O | PCI-PM L1.1 Supported (PPL11S) When set, this bit indicates that L1.SNOOZ sub-state is supported and this bit must be set by all ports implementing L1 Sub-States. A port that supports L1.OFF must support L1.SNOOZ. |
0 | 1b | RW/O | PCI-PM L1.2 Supported (PPL12S) When set, this bit indicates that L1.OFF power management feature is supported. |