General Purpose Event 0 Status [31:0] (GPE0_STS_31_0) – Offset 60 - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

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General Purpose Event 0 Status [31:0] (GPE0_STS_31_0) – Offset 60

Bit Range	Default	Access	Field Name and Description
31:0	0h	RW/1C/V	General Purpose Event 0 Status [31:0] (GPE0_STS_31_0) These bits are set any time the corresponding GPIO is setup as an input and the corresponding GPIO signal is high (or low if the corresponding RXINV bit is set). If the corresponding enable bit is set in the GPE0_EN_31_0 register, then when the GPE0_STS_31_0 bit is set: - If system is in an S3-S5 state, the event will also wake the system. - If system is in an S0 state (or upon waking back to S0), an SCI will be caused, depending on the GPIROUTSCI bit for the corresponding GPI. These bits are sticky bits and are cleared by writing a 1 back to this bit position. Note: The GPP/GPD group mapped to this GPE0_STS_31_0 is configured via GPIO_CFG.DW0 and MISCCFG.DW0. Both GPIO_CFG.DW0 and MISCCFG.DW0 must be programmed to the same value.

Bit Range

Default

Access

Field Name and Description

31:0

RW/1C/V

General Purpose Event 0 Status [31:0] (GPE0_STS_31_0)

These bits are set any time the corresponding GPIO is setup as an input and the corresponding GPIO signal is high (or low if the corresponding RXINV bit is set). If the corresponding enable bit is set in the GPE0_EN_31_0 register, then when the GPE0_STS_31_0 bit is set:

- If system is in an S3-S5 state, the event will also wake the system.

- If system is in an S0 state (or upon waking back to S0), an SCI will be caused, depending on the GPIROUTSCI bit for the corresponding GPI. These bits are sticky bits and are cleared by writing a 1 back to this bit position.

Note: The GPP/GPD group mapped to this GPE0_STS_31_0 is configured via GPIO_CFG.DW0 and MISCCFG.DW0. Both GPIO_CFG.DW0 and MISCCFG.DW0 must be programmed to the same value.

General Purpose Event 0 Status [63:32] (GPE0_STS_63_32)

Over-Clocking WDT Control (OC_WDT_CTL) General Purpose Event 0 Status [63:32] (GPE0_STS_63_32)