Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
I/O Enables (IOE) – Offset 82
I/O Enables.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
14 | - | - | Reserved
|
13 | 0b | RW | Microcontroller Enable #2 (ME2) Enables decoding of I/O locations 4Eh and 4Fh to LPC. |
12 | 0b | RW | SuperI/O Enable (SE) Enables decoding of I/O locations 2Eh and 2Fh to LPC. |
11 | 0b | RW | Microcontroller Enable #1 (ME1) Enables decoding of I/O locations 62h and 66h to LPC. |
10 | 0b | RW | Keyboard Enable (KE) Enables decoding of the keyboard I/O locations 60h and 64h to LPC. |
9 | 0b | RW | High Gameport Enable (HGE) Enables decoding of the I/O locations 208h to 20Fh to LPC. |
8 | 0b | RW | Low Gameport Enable (LGE) Enables decoding of the I/O locations 200h to 207h to LPC. |
7:4 | - | - | Reserved
|
3 | 0b | RW | Floppy Drive Enable (FDE) Enables decoding of the FDD range to LPC. Range is selected by LIOD.FDE |
2 | 0b | RW | Parallel Port Enable (PPE) Enables decoding of the LPT range to LPC. Range is selected by LIOD.LPT. |
1 | 0b | RW | Com Port B Enable (CBE) Enables decoding of the COMB range to LPC. Range is selected LIOD.CB. |
0 | 0b | RW | Com Port A Enable (CAE) Enables decoding of the COMA range to LPC. Range is selected LIOD.CA. |